Featured:
Small Package、Integrated、Modularization
Large Dynamic Gain Adjustment Range
Flexible and Variable Sampling Rate
Provide Secondary Development and DEMO
Electronical Specifications
Parameter | Typical Value |
Frequency Range | 50MHz~4.8GHz |
Sampling BW | 80MHz |
ADC Quantization Bits | 16bit |
ADC Significant Bits | 11.2bit |
DDR4 | 4GB/64bit |
QDR | 72Mbit/18bit |
Mid-Freq. Frequency | 140MHz |
Sampling Rate | 190MSPS/250MSPS Max |
Signal Input Level | -70dBm~+10dBm |
Max Input Level | +10dBm |
Instantaneous Dynamic Range | 50dB Min |
Local Oscillator Frequency Stability | 0.02ppm Max |
Local Oscillator Phase Noise | ≤-95dBc/Hz@10kHz |
Phase Noise | 12dB Max |
External Reference Clock | 10MHz |
Other Specifications
Parameter | Typical Value |
Dimension | 266.7*150.5*34mm |
Power Supply | 12V/1.5A |
Operating Temperature | -40~+85°C |
Storage Temperature | -45~+85°C |
Humidity | 5%~95% |
Interface Definition:
Interface Name | I/O | Note |
JTAG | I/O | FPGA program |
RF_IN | I | 50MHz~4.8GHz RFin |
CLKIN | I | 10MHz External Ref. clock in |
V_IN | I | 12V Power Supply |
PCIE | I/O | PCIE2.0X8 |